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Browsing by Author Chang, Chia-Yi

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Issue DateTitleAuthor(s)
2009Buffer/Flip-Flop Block Planning for Power-Integrity-Driven FloorplanningPan, Hsin-Hua; Chen, Hung-Ming; Chang, Chia-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2006Design migration from peripheral ASIC design to area-10 flip-chip design by chip I/O planning and legalizationChang, Chia-Yi; Chen, Hung-Ming; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jan-2008Design migration from peripheral ASIC design to area-I/O flip-chip design by chip I/O planning and legalizationChang, Chia-Yi; Chen, Hung-Ming; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
Showing results 1 to 3 of 3