瀏覽 的方式： 作者 Chang, Mu-Tien
顯示 1 到 4 筆資料，總共 4 筆
| 公開日期 | 標題 | 作者 |
| 2007 | A 65nm low power 2T1D embedded DRAM with leakage current reduction | Chang, Mu-Tien; Huang, Po-Tsang; Hwang, Wei; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 8-七月-2010 | Dual-threshold-voltage two-port sub-threshold SRAM cell apparatus | Chang, Mu-Tien; Huang, Po-Tsang; Hwang, Wei |
| 2008 | A Fully-Differential Subthreshold SRAM Cell with Auto-Compensation | Chang, Mu-Tien; Hwang, Wei; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2008 | A ROBUST ULTRA-LOW POWER ASYNCHRONOUS FIFO MEMORY WITH SELF-ADAPTIVE POWER CONTROL | Chang, Mu-Tien; Huang, Po-Tsang; Hwang, Wei; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
