瀏覽 的方式： 作者 Chen, Han-Wei
顯示 1 到 3 筆資料，總共 3 筆
| 公開日期 | 標題 | 作者 |
| 1-二月-2020 | Effect of Seed Layer on Gate-All-Around Poly-Si Nanowire Negative-Capacitance FETs With MFMIS and MFIS Structures: Planar Capacitors to 3-D FETs | Lee, Shen-Yang; Chen, Han-Wei; Shen, Chiuan-Huei; Kuo, Po-Yi; Chung, Chun-Chih; Huang, Yu-En; Chen, Hsin-Yu; Chao, Tien-Sheng; 電子物理學系; 光電工程學系; 光電工程研究所; Department of Electrophysics; Department of Photonics; Institute of EO Enginerring |
| 1-一月-2019 | Experimental Demonstration of Performance Enhancement of MFMIS and MFIS for 5-nm x 12.5-nm Poly-Si Nanowire Gate-All-Around Negative Capacitance FETs Featuring Seed-Layer and PMA-Free Process | Lee, Shen-Yang; Chen, Han-Wei; Shen, Chiuan-Huei; Kuo, Po-Yi; Chung, Chun-Chih; Huang, Yu-En; Chen, Hsin-Yu; Chao, Tien-Sheng; 電子物理學系; 光電工程學系; 光電工程研究所; Department of Electrophysics; Department of Photonics; Institute of EO Enginerring |
| 1-十一月-2019 | Experimental Demonstration of Stacked Gate- All-Around Poly-Si Nanowires Negative Capacitance FETs With Internal Gate Featuring Seed Layer and Free of Post-Metal Annealing Process | Lee, Shen-Yang; Chen, Han-Wei; Shen, Chiuan-Huei; Kuo, Po-Yi; Chung, Chun-Chih; Huang, Yu-En; Chen, Hsin-Yu; Chao, Tien-Sheng; 電子物理學系; 光電工程學系; Department of Electrophysics; Department of Photonics |
