Browsing by Author Chou, KY
Showing results 1 to 3 of 3
| Issue Date | Title | Author(s) |
| 1-Oct-2001 | Active circuit's under wire bonding I/O, pads in 0.13 mu m eight-level Cu metal, FSG low-K inter-metal dielectric CMOS technology(+) | Chou, KY; Chen, MJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Dec-2002 | Active devices under CMOS I/O pads | Chou, KY; Chen, MJ; Liu, CW; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Jul-2001 | ESD protection under grounded-up bond pads in 0.13 mu m eight-level copper metal, fluorinated silicate glass low-k intermetal dielectric CMOS process technology | Chou, KY; Chen, MJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
