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Browsing by Author Hsu, Sheng-Fu

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Showing results 1 to 5 of 5
Issue DateTitleAuthor(s)
1-Sep-2006Component-level measurement for transient-induced latch-up in CMOS ICs under system-level ESD considerationsKer, Ming-Dou; Hsu, Sheng-Fu; 電機學院; College of Electrical and Computer Engineering
1-Apr-2007Dependence of device structures on latchup immunity in a high-voltage 40-V CMOS process with drain-extended MOSFETsHsu, Sheng-Fu; Ker, Ming-Dou; 電機學院; College of Electrical and Computer Engineering
2006Experimental evaluation and device simulation of device structure influences on latchup immunity in high-voltage 40-V CMOS processHsu, Sheng-Fu; Ker, Ming-Dou; Lin, Geeng-Lih; Jou, Yeh-Ning; 電機學院; College of Electrical and Computer Engineering
2006Study of board-level noise filters to prevent transient-induced latchup in CMOS integrated circuits during EMC/ESD testHsu, Sheng-Fu; Ker, Ming-Dou; 電機學院; College of Electrical and Computer Engineering
1-Aug-2007Transient-induced latchup dependence on power-pin damping frequency and damping factor in CMOS integrated circuitsHsu, Sheng-Fu; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
Showing results 1 to 5 of 5