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Browsing by Author Jiang, TY

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Issue DateTitleAuthor(s)
2002Effective error diagnosis for RTL designs in HDLSJiang, TY; Liu, CNJ; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2004An efficient logic extraction algorithm using partitioning and circuit encodingHuang, L; Jiang, TY; Jou, JY; Huang, HL; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2005Estimating likelihood of correctness for error candidates to assist debugging faulty HDL designsJiang, TY; Liu, CNJ; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
Showing results 1 to 3 of 3