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Showing results 1 to 17 of 17
Issue DateTitleAuthor(s)
1-Aug-1996Analytical spatio-temporal design of Kerr lens mode-locked laser resonatorsLin, KH; Hsieh, WF; 交大名義發表; 光電工程學系; National Chiao Tung University; Department of Photonics
1-Aug-1996Analytical spatio-temporal design of Kerr lens mode-locked laser resonatorsLin, KH; Hsieh, WF; 光電工程研究所; Institute of EO Enginerring
1-Apr-1996Construction of a wavelength-tunable self-starting Kerr lens mode-locked Ti:sapphireLai, JG; Lin, KH; Juang, DG; Hsieh, WF; 交大名義發表; 光電工程學系; National Chiao Tung University; Department of Photonics
1-Aug-2004Design on ESD protection scheme for IC with power-down-mode operationKer, MD; Lin, KH; 電機學院; College of Electrical and Computer Engineering
1-Aug-1997Differential gain and buildup dynamics of self-starting Kerr lens mode-locked Ti:sapphire laser without an internal apertureJuang, DG; Chen, YC; Hsu, SH; Lin, KH; Hsieh, WF; 光電工程學系; Department of Photonics
1-Aug-1997Differential gain and buildup dynamics of self-starting Kerr lens mode-locked Ti:sapphire laser without an internal apertureJuang, DG; Chen, YC; Hsu, SH; Lin, KH; Hsieh, WF; 光電工程研究所; Institute of EO Enginerring
1-Sep-2004Double snapback characte'ristics in high-voltage nMOSFETs and the impact to on-chip ESD protection designKer, MD; Lin, KH; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Feb-2006Electrostatic discharge protection scheme without leakage current path for CMOS IC operating in power-down-mode condition on a system boardLin, KH; Ker, MD; 電機學院; College of Electrical and Computer Engineering
1-Nov-2005ESD protection design for I/O cells with embedded SCR structure as power-rail ESD clamp device in nanoscale CMOS technologyKer, MD; Lin, KH; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Aug-2005The impact of low-holding-voltage issue in high-voltage CMOS technology and the design of latchup-free power-rail ESD clamp circuit for LCD driver ICsKer, MD; Lin, KH; 電機學院; College of Electrical and Computer Engineering
22-Aug-2005Low threshold and high power output of a diode-pumped nonlinear mirror mode-locked Nd : GdVO4 laserLin, JH; Yang, WH; Hsieh, WF; Lin, KH; 光電工程學系; Department of Photonics
2003MOS-bounded diodes for on-chip ESD protection in a 0.15-mu m shallow-trench-isolation salicided CMOS processKer, MD; Lin, KH; Chuang, CH; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Mar-2005MOS-bounded diodes for on-chip ESD protection in deep submicron CMOS processKer, MD; Lin, KH; Chuang, CH; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2006Multistability in recurrent neural networksCheng, CY; Lin, KH; Shih, CW; 應用數學系; Department of Applied Mathematics
1-Oct-2004On-chip ESD protection design with substrate-triggered technique for mixed-voltage I/O circuits in subquarter-micrometer CMOS processKer, MD; Lin, KH; Chuang, CH; 電機學院; College of Electrical and Computer Engineering
1-Feb-2006Overview on electrostatic discharge protection designs for mixed-voltage I/O interfaces: Design concept and circuit implementationsKer, MD; Lin, KH; 電機學院; College of Electrical and Computer Engineering
15-Jan-2000Thin-film transistors with polycrystalline silicon films prepared by two-step rapid thermal annealingCheng, HC; Huang, CY; Wang, FS; Lin, KH; Tarntair, FG; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
Showing results 1 to 17 of 17