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Browsing by Author Luo, Cheng-Wei

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Issue DateTitleAuthor(s)
1-Mar-2011Impacts of Multiple-Gated Configuration on the Characteristics of Poly-Si Nanowire SONOS DevicesHsu, Hsing-Hui; Lin, Horng-Chih; Luo, Cheng-Wei; Su, Chun-Jung; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jul-2011Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory DevicesLuo, Cheng-Wei; Lin, Horng-Chih; Lee, Ko-Hui; Chen, Wei-Chen; Hsu, Hsing-Hui; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009多晶矽奈米線結合內嵌式奈米矽晶體之SONOS記憶體元件之研究羅正瑋; Luo, Cheng-Wei; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子研究所
Showing results 1 to 3 of 3