瀏覽 的方式： 作者 Ma, DJ
顯示 1 到 4 筆資料，總共 4 筆
| 公開日期 | 標題 | 作者 |
| 1-六月-1997 | A CMOS mismatch model and scaling effects | Wong, SC; Pan, KH; Ma, DJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-六月-1997 | A CMOS mismatch model and scaling effects | Wong, SC; Pan, KH; Ma, DJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-五月-2000 | An empirical three-dimensional crossover capacitance model for multilevel interconnect VLSI circuits | Wong, SC; Lee, TGY; Ma, DJ; Chao, CJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-二月-2000 | Modeling of interconnect capacitance, delay, and crosstalk in VLSI | Wong, SC; Lee, GY; Ma, DJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
