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公開日期標題作者
1-三月-2009Design of Sub-90 nm Low-Power and Variation Tolerant PD/SOI SRAM Cell Based on Dynamic Stability MetricsJoshi, Rajiv V.; Mukhopadhyay, Saibal; Plass, Donald W.; Chan, Yuen H.; Chuang, Ching-Te; Tan, Yue; 交大名義發表; National Chiao Tung University
1-九月-2008An on-chip test structure and digital measurement method for statistical characterization of local random variability in a processMukhopadhyay, Saibal; Kim, Keunwoo; Jenkins, Keith A.; Chuang, Ching-Te; Roy, Kaushik; 交大名義發表; National Chiao Tung University
2008Pre-Si Estimation and Compensation of SRAM Layout Deficiencies to Achieve Target Performance and YieldBansal, Aditya; Singh, Rama N.; Mukhopadhyay, Saibal; Han, Geng; Heng, Fook-Luen; Chuang, Ching-Te; 交大名義發表; National Chiao Tung University
2008Ring oscillator circuit structures for measurement of isolated NBTI/PBTI effectsKim, Jae-Joon; Rao, Rahul; Mukhopadhyay, Saibal; Chuang, Ching-Te; 交大名義發表; National Chiao Tung University
1-一月-2011SRAM Write-Ability Improvement With Transient Negative Bit-Line VoltageMukhopadhyay, Saibal; Rao, Rahul M.; Kim, Jae-Joon; Chuang, Ching-Te; 交大名義發表; National Chiao Tung University
1-一月-2011SRAM Write-Ability Improvement With Transient Negative Bit-Line VoltageMukhopadhyay, Saibal; Rao, Rahul M.; Kim, Jae-Joon; Chuang, Ching-Te; 交大名義發表; National Chiao Tung University
顯示 1 到 6 筆資料，總共 6 筆