National Chiao Tung University Institutional Repository：Browsing IR@NCTU

Browsing by Author Tung, SW

Showing results 1 to 8 of 8

Issue Date	Title	Author(s)
1-Jan-2003	Automatic interconnection rectification for SoC design verification based on the port order fault model	Wang, CY; Tung, SW; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2003	An automatic interconnection rectification technique for SoC design integration	Wang, CY; Tung, SW; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Oct-2002	An automorphic approach to verification pattern generation for SoC design verification using port-order fault model	Wang, CY; Tung, SW; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2001	An improved AVPG algorithm for SoC design verification using port order fault model	Wang, CY; Tung, SW; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Sep-1998	A logical fault model for library coherence checking	Tung, SW; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Apr-2002	On automatic-verification pattern generation for SoC with port-order fault model	Wang, CY; Tung, SW; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2001	On generation of the minimum pattern set for data path elements in SoC design verification based on port order fault model	Wang, CY; Tung, SW; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2003	SOC design integration by using automatic interconnection rectification	Wang, CY; Tung, SW; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics

Showing results 1 to 8 of 8