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Issue DateTitleAuthor(s)
1-Jan-1993ANALYSIS AND DESIGN OF A NEW RACE-FREE 4-PHASE CMOS LOGICWU, CY; CHENG, KH; WANG, JS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Feb-1987THE ANALYSIS AND DESIGN OF CMOS MULTIDRAIN LOGIC AND STACKED MULTIDRAIN LOGICWU, CY; WANG, JS; TSAI, MK; 電控工程研究所; Institute of Electrical and Control Engineering
1-Jun-1989CMOS NONTHRESHOLD LOGIC (NTL) AND CASCODE NONTHRESHOLD LOGIC (CNTL) FOR HIGH-SPEED APPLICATIONSWANG, JS; WU, CY; TSAI, MK; 電控工程研究所; Institute of Electrical and Control Engineering
1-Dec-1988LOW-POWER DYNAMIC TERNARY LOGICWANG, JS; WU, CY; TSAI, MK; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-May-1989NOVEL DYNAMIC CMOS LOGIC FREE FROM PROBLEMS OF CHARGE SHARING AND CLOCK SKEWWANG, JS; WU, CY; TSAI, MK; 電控工程研究所; Institute of Electrical and Control Engineering
Showing results 1 to 5 of 5