瀏覽 的方式： 作者 Wang, Li-Rong
顯示 1 到 6 筆資料，總共 6 筆
| 公開日期 | 標題 | 作者 |
| 1-十月-2013 | A Low-Power Level-Converting Double-Edge-Triggered Flip-Flop Design | Wang, Li-Rong; Lo, Kai-Yu; Jou, Shyh-Jye; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2007 | Mixed-Vth (MVT) CMOS circuit design for low power cell libraries | Lin, Jiun-Yi; Wang, Li-Rong; Hu, Chia-Lmi; Jou, Shyh-Jye; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2008 | A reconfigurable MAC architecture implemented with mixed-V(t) standard cell library | Wang, Li-Rong; Chiu, Yi-Wei; Hu, Chia-Lin; Tu, Ming-Hsien; Jou, Shyh-Jye; Lee, Chung-Len; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-六月-2011 | Well-Structured Modified Booth Multiplier and Its Application to Reconfigurable MAC Design | Wang, Li-Rong; Tu, Ming-Hsien; Jou, Shyh-Jye; Lee, Chung-Len; 電機工程學系; Department of Electrical and Computer Engineering |
| 2008 | A well-structured modified Booth multiplier design | Wang, Li-Rong; Jou, Shyh-Jye; Lee, Chung-Len; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2012 | 低功率低電壓之資料處理單元設計 | 王儷蓉; Wang, Li-Rong; 周世傑; Jou, Shyh-Jye; 電子工程學系 電子研究所 |
