Browsing by Author Wang, Pei-Yu
Showing results 1 to 11 of 11
| Issue Date | Title | Author(s) |
| Jan-2016 | Band Engineering to Improve Average Subthreshold Swing by Suppressing Low Electric Field Band-to-Band Tunneling With Epitaxial Tunnel Layer Tunnel FET Structure | Wang, Pei-Yu; Tsui, Bing-Yue; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Jan-2016 | Band Engineering to Improve Average Subthreshold Swing by Suppressing Low Electric Field Band-to-Band Tunneling With Epitaxial Tunnel Layer Tunnel FET Structure | Wang, Pei-Yu; Tsui, Bing-Yue; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Jan-2014 | Enhancing the Performance of Germanium Channel nMOSFET Using Phosphorus Dopant Segregation | Chen, Che-Wei; Tzeng, Ju-Yuan; Chung, Cheng-Ting; Chien, Hung-Pin; Chien, Chao-Hsin; Luo, Guang-Li; Wang, Pei-Yu; Tsui, Bing-Yue; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2015 | Evaluation of Electrical Performance of Various Tunnel TFETs | Huang, Chi; Hung, Tao-Yi; Wang, Pei-Yu; Tsui, Bing-Yue; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Dec-2015 | Experimental Demonstration of p-Channel Germanium Epitaxial Tunnel Layer (ETL) Tunnel FET With High Tunneling Current and High ON/OFF Ratio | Wang, Pei-Yu; Tsui, Bing-Yue; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| Apr-2016 | Investigation Into Gate-to-Source Capacitance Induced by Highly Efficient Band-to-Band Tunneling in p-Channel Ge Epitaxial Tunnel Layer Tunnel FET | Wang, Pei-Yu; Tsui, Bing-Yue; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-五月-2010 | Multi-gate non-volatile memories with nanowires as charge storage material | Tsui, Bing-Yue; Wang, Pei-Yu; Chen, Ting-Yeh; Cheng, Jung-Chien; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-八月-2015 | A Novel Approach Using Discrete Grain-Boundary Traps to Study the Variability of 3-D Vertical-Gate NAND Flash Memory Cells | Wang, Pei-Yu; Tsui, Bing-Yue; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2014 | Simulation of Grain-Boundary Traps Effect for 3D Vertical Gate NAND Flash Memory Cell : From Structure Geometry to Trap Description | Wang, Pei-Yu; Tsui, Bing-Yue; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-十二月-2013 | SixGe1-x Epitaxial Tunnel Layer Structure for P-Channel Tunnel FET Improvement | Wang, Pei-Yu; Tsui, Bing-Yue; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2015 | 磊晶穿隧層穿隧電晶體之研究 | 王培宇; 崔秉鉞; Wang, Pei-Yu; Tsui, Bing-Yue; 電子工程學系 電子研究所 |
