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Issue DateTitleAuthor(s)
2004An accurate RF CMOS gate resistance model compatible with HSPICELin, HW; Chung, SS; Wong, SC; Huang, GW; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2002Characterization and modeling of on-chip inductor substrate coupling effectChao, CJ; Wong, SC; Hsu, CJ; Chen, MJ; Leu, LY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jan-2002Characterization and Modeling of on-chip inductor substrate coupling effectChao, CJ; Wong, SC; Hsu, CJ; Chen, MJ; Leu, LY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2002Characterization and Modeling of on-chip inductor substrate coupling effectChao, CJ; Wong, SC; Hsu, CJ; Chen, MJ; Leu, LY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Feb-2002Characterization and Modeling of on-chip spiral inductors for Si RFICsChao, CJ; Wong, SC; Kao, CH; Chen, MJ; Leu, LY; Chiu, KY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jun-1997A CMOS mismatch model and scaling effectsWong, SC; Pan, KH; Ma, DJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jun-1997A CMOS mismatch model and scaling effectsWong, SC; Pan, KH; Ma, DJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-May-2000An empirical three-dimensional crossover capacitance model for multilevel interconnect VLSI circuitsWong, SC; Lee, TGY; Ma, DJ; Chao, CJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Nov-1998An extraction method to determine interconnect parasitic parametersChao, CJ; Wong, SC; Chen, MJ; Liew, BK; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Nov-1998An extraction method to determine interconnect parasitic parametersChao, CJ; Wong, SC; Chen, MJ; Liew, BK; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Aug-2002The extraction of MOSFET gate capacitance from S-parameter measurementsSu, JG; Wong, SC; Chang, CY; Huang, TY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Dec-2001Generalized interconnect delay time and crosstalk models: I. Applications of interconnect optimization designLee, TGY; Tseng, TY; Wong, SC; Yang, CJ; Liang, MS; Cheng, HC; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Dec-2001Generalized interconnect delay time and crosstalk models: II. Crosstalk-induced delay time deterioration and worst crosstalk modelsLee, TGY; Tseng, TY; Wong, SC; Yang, CJ; Liang, MS; Cheng, HC; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Oct-2001Improving the RF performance of 0.18 mu m CMOS with deep n-well implantationSu, JG; Hsu, HM; Wong, SC; Chang, CY; Huang, TY; Sun, JYC; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Apr-2002An investigation on RF CMOS stability related to bias and scalingSu, JG; Wong, SC; Chang, CY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2001Investigations of bulk dynamic threshold-voltage MOSFET with 65GHz "normal-mode" Ft and 220GHz "over-drive mode" Ft for RF applicationsChang, CY; Su, JG; Hsu, HM; Wong, SC; Huang, TY; Sun, YC; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Feb-2000Modeling of interconnect capacitance, delay, and crosstalk in VLSIWong, SC; Lee, GY; Ma, DJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2000New insights on RF CMOS stability related to bias, scaling, and temperatureSu, JG; Wong, SC; Chang, CY; Chiu, KY; Huang, TY; Ou, CT; Kao, CH; Chao, CJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2001Pressure boundary treatment in internal gas flows at subsonic speed using the DSMC methodWu, JS; Lee, WS; Lee, F; Wong, SC; 機械工程學系; Department of Mechanical Engineering
1-Aug-2001Pressure boundary treatment in micromechanical devices using the direct simulation Monte Carlo methodWu, JS; Lee, F; Wong, SC; 機械工程學系; Department of Mechanical Engineering
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