1. You are Here：

Browsing by Author Yan, Jin-Tai

Jump to: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
or enter first few letters:  
Showing results 1 to 6 of 6
Issue DateTitleAuthor(s)
2008Block-Level Thermal Model for Floorplan Stage in VLSI Design FlowLin, Shun-Hua; Yan, Jin-Tai; Chiueh, Herming; 電信工程研究所; Institute of Communications Engineering
1-Jan-2019Construction of Delay-Driven GNR Routing TreeYan, Jin-Tai; Yen, Chia-Heng; 生物資訊及系統生物研究所; Institude of Bioinformatics and Systems Biology
1-Jan-2018Feasible Assignment of Micro-Bumps in 3D ICsYan, Jin-Tai; Yen, Chia-Heng; 生物資訊及系統生物研究所; Institude of Bioinformatics and Systems Biology
2006Floorplan-aware decoupling capacitance budgeting on equivalent circuit modelYan, Jin-Tai; Lin, Kai-Ping; Luo, Yue-Fong; 資訊工程學系; Department of Computer Science
2006Optimal shielding insertion for inductive noise avoidanceYan, Jin-Tai; Lin, Kuen-Ming; Chen, Yen-Hsiang; 資訊工程學系; Department of Computer Science
2008Timing-Constrained Yield-Driven Redundant Via InsertionYan, Jin-Tai; Chen, Zhi-Wei; Chiang, Bo-Yi; Lee, Yu-Min; 電信工程研究所; Institute of Communications Engineering
Showing results 1 to 6 of 6