Browsing by Author Yeh, WC
Showing results 1 to 6 of 6
| Issue Date | Title | Author(s) |
| 1-Oct-2003 | Generalized earliest-first fast addition algorithm | Yeh, WC; Jen, CW; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2000 | A high performance carry-save to signed-digit recoder for fused addition-multiplication | Yeh, WC; Jen, CW; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Mar-2003 | High-speed and low-power split-radix FFT | Yeh, WC; Jen, CW; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Jul-2000 | High-speed booth encoded parallel multiplier design | Yeh, WC; Jen, CW; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 1-Sep-2002 | Index rendering: Hardware-efficient architecture for 3-D graphics in multimedia system | Liang, BS; Lee, YC; Yeh, WC; Jen, CW; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
| 2000 | On the study of logarithmic time parallel adders | Yeh, WC; Jen, CW; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics |
