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dc.contributor.authorShih, Che-Huaen_US
dc.contributor.authorYen, Chia-Chihen_US
dc.contributor.authorLin, Shen-Tienen_US
dc.contributor.authorLin, Hermesen_US
dc.contributor.authorJou, Jing-Yangen_US
dc.date.accessioned2017-04-21T06:50:05Z-
dc.date.available2017-04-21T06:50:05Z-
dc.date.issued2011en_US
dc.identifier.isbn978-1-4244-8499-7en_US
dc.identifier.urihttp://hdl.handle.net/11536/134794-
dc.description.abstractAccurate peak power measurement requires detailed switching and delay information for each signal over the entire simulation. Performing a full signal dump and power calculation for a long simulation run usually spends a large amount of time and disk space. In this paper, we propose an Essential-signal-based methodology which only performs power analysis over a small subset of the original simulation but still acquires the true peak power value. Experimental results show that the proposed methodology significantly decreases both time (about 18 X speedup) and disk space usage (about 87% reduction) against the traditional power analysis flow.en_US
dc.language.isoen_USen_US
dc.titleAccelerating Dynamic Peak Power Analysis Using An Essential-Signal-Based Methodologyen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2011 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT)en_US
dc.citation.spage140en_US
dc.citation.epage144en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000300488600027en_US
dc.citation.woscount0en_US
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