PD-SOI MOSFET Body-to-Body Leakage Scaling Trend and Optimization

doi:10.1109/SOI.2008.4656288

Full metadata record

DC Field	Value	Language
dc.contributor.author	Lo, H. C.	en_US
dc.contributor.author	Luo, W. C.	en_US
dc.contributor.author	Lu, W. Y.	en_US
dc.contributor.author	Cheng, C. F.	en_US
dc.contributor.author	Wu, Benny	en_US
dc.contributor.author	Chen, T. L.	en_US
dc.contributor.author	Lien, C. H.	en_US
dc.contributor.author	Fung, Samuel K. H.	en_US
dc.contributor.author	Tuan, H. C.	en_US
dc.date.accessioned	2017-04-21T06:49:36Z	-
dc.date.available	2017-04-21T06:49:36Z	-
dc.date.issued	2008	en_US
dc.identifier.isbn	978-1-4244-1954-8	en_US
dc.identifier.issn	1078-621X	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/SOI.2008.4656288	en_US
dc.identifier.uri	http://hdl.handle.net/11536/135058	-
dc.description.abstract	Body-to-Body leakage (BBL) in stacked transistor configuration has been characterized by different back gate biases (Vbg), SOI thicknesses, and poly spacings. BBL increases significantly from 65nm to 45nm node mainly due to smaller poly spacing and shallower S/D junctions. By implant optimization and reduction of the SOI thickness, BBL can be reduced below reverse junction leakage level.	en_US
dc.language.iso	en_US	en_US
dc.title	PD-SOI MOSFET Body-to-Body Leakage Scaling Trend and Optimization	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.doi	10.1109/SOI.2008.4656288	en_US
dc.identifier.journal	2008 IEEE INTERNATIONAL SOI CONFERENCE, PROCEEDINGS	en_US
dc.citation.spage	49	en_US
dc.citation.epage	+	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000262065700018	en_US
dc.citation.woscount	0	en_US
Appears in Collections:	Conferences Paper