Title: Analysis of Negative Bias Temperature Instability Degradation in p-Type Low-Temperature Polycrystalline Silicon Thin-Film Transistors of Different Grain Sizes
Authors: Tu, Hong-Yi
Tsao, Yu-Ching
Tai, Mao-Chou
Chang, Ting-Chang
Tsai, Yu-Lin
Huang, Shin-Ping
Zheng, Yu-Zhe
Wang, Yu-Xuan
Chen, Hong-Chih
Tsai, Tsung-Ming
Wu, Chia-Chuan
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
Keywords: Negative bias temperature instability;Thermal variables control;Stress;Grain boundaries;Grain size;Degradation;Thin film transistors;LTPS thin-film transistor;negative bias temperature instability;grain size;excimer laser annealing
Issue Date: 1-Nov-2019
Abstract: This letter investigates degradation after negative bias temperature instability (NBTI) stress applied to LTPS TFTs with different polycrystalline-silicon grain sizes. The initial characteristics of the LTPS TFTs are similar regardless of grain size; however, we observed a different degree of degradation after NBTI depending on grain size. In general, after NBTI, both grain boundary traps and interface traps were generated. We found that the degree of NBTI degradation is dominated by the concentration of grain boundary traps, which themselves are a result of the different grain sizes that occur due to excimer laser annealing energy. At initial, dangling bonds in the grain boundaries and at the interface are passivated by hydrogen atoms, hence the initial characteristics are similar. Since the large grain of poly-Si initially generates more dangling bonds in the grain boundaries, after NBTI, hydrogen depassivation generates more grain boundary traps and causes much more serious degradation in device performance.
URI: http://dx.doi.org/10.1109/LED.2019.2942102
http://hdl.handle.net/11536/153253
ISSN: 0741-3106
DOI: 10.1109/LED.2019.2942102
Journal: IEEE ELECTRON DEVICE LETTERS
Volume: 40
Issue: 11
Begin Page: 1768
End Page: 1771
Appears in Collections:Articles