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dc.contributor.authorHuang, C. J.en_US
dc.contributor.authorChen, C. S.en_US
dc.contributor.authorWen, K. A.en_US
dc.contributor.authorCheng, Y. T.en_US
dc.contributor.authorChen, J. Y.en_US
dc.contributor.authorChang, C. S.en_US
dc.contributor.authorChou, W. C.en_US
dc.date.accessioned2014-12-08T15:21:44Z-
dc.date.available2014-12-08T15:21:44Z-
dc.date.issued2011en_US
dc.identifier.isbn978-1-4244-9289-3en_US
dc.identifier.urihttp://hdl.handle.net/11536/15471-
dc.description.abstractThe first standard CMOS IC foundry flow is presented for the monolithic integration of MEMS sensor, analog readout circuit and wafer level capping on standard 0.18um 1P6M technology. The sensor and circuit parts are fabricated at first on the same 8 '' substrate using a standard 0.18um 1P6M CMOS process. The sensor part is then micromachined and released by a foundry-based post-CMOS DRIE process followed by wafer level capping. The test vehicle for the proposed integration flow contains a single-axial accelerometer, analog readout circuit with input common-mode feedback and QFN64 package. The measurement results show that the whole system can have 206mV/g of sensitivity and output noise is less than 250 mu g/root Hz. The proposed methodology has led a promising way for integrating MEMS, IC and package in a conventional IC foundry manufacturing flow.en_US
dc.language.isoen_USen_US
dc.titleStandard 0.18um 1P6M CMOS IC foundry flow for accelerometer, analog readout circuit and wafer level capping package integrationen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2011 IEEE SENSORSen_US
dc.citation.spage750en_US
dc.citation.epage753en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000299901200178-
Appears in Collections:Conferences Paper