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dc.contributor.authorChen, JSen_US
dc.contributor.authorKer, MDen_US
dc.date.accessioned2014-12-08T15:25:22Z-
dc.date.available2014-12-08T15:25:22Z-
dc.date.issued2005en_US
dc.identifier.isbn0-7803-8803-8en_US
dc.identifier.urihttp://hdl.handle.net/11536/17749-
dc.description.abstractThe effects of the gate-oxide reliability of MOSFETs on operational amplifiers were investigated with the two-stage and folded-cascode structures in a 130-nm low-voltage CMOS process. The tested operating conditions include unity-gain buffer (close-loop configuration) and comparator (open-loop configuration) under different input frequencies and signals. After overstress, the small-signal parameters, such as small-signal gain, unity-gain frequency, and phase margin, were measured to verify the impact of gate-oxide reliability on circuit performances of the operational amplifier. The gate-oxide reliability can be improved by the stacked configuration in the operational amplifier with folded-cascode structure. A simple equivalent device model of gate-oxide reliability for CMOS devices in analog circuits was investigated and simulated.en_US
dc.language.isoen_USen_US
dc.titleImpact of MOSFET gate-oxide reliability on CMOS operational amplifiers in a 130-nm low-voltage CMOS processen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2005 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 43RD ANNUALen_US
dc.citation.spage423en_US
dc.citation.epage430en_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000230058000070-
Appears in Collections:Conferences Paper