Title: MEMORY CAPACITY AWARE NON-BLOCKING DATA TRANSFER ON GPGPU
Authors: Liu, Hao-Wei
Kuo, Hsien-Kai
Chen, Kuan-Ting
Lai, Bo-Cheng Charles
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
Keywords: GPGPU;Memory Optimization;Non-blocking data transfer
Issue Date: 2013
Abstract: The massive data demand of GPGPUs requires expensive memory modules, such as GDDR, to support high data bandwidth. The high cost poses constraints on the total memory capacity available to GPGPUs, and the data need to be transferred between the host CPUs and GPGPUs. However, the long latency of data transfers has resulted in significant performance overhead. To alleviate this issue, the modern GPGPUs have implemented the non-blocking data transfer allowing a GPGPU to perform computing while the data is being transmitted. This paper proposes a capacity aware scheduling algorithm that exploits the non-blocking data transfer in modern GPGPUs. By effectively taking the advantage of non-blocking transfers, experiment results demonstrate an average of 24.01% performance improvement when compared to existing approaches that only consider memory capacity.
URI: http://hdl.handle.net/11536/23920
ISBN: 978-1-4673-6238-2
ISSN: 2162-3562
Journal: 2013 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS (SIPS)
Begin Page: 395
End Page: 400
Appears in Collections:Conferences Paper