Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, CY | en_US |
dc.contributor.author | Yang, JN | en_US |
dc.contributor.author | Cheng, YC | en_US |
dc.date.accessioned | 2014-12-08T15:39:07Z | - |
dc.date.available | 2014-12-08T15:39:07Z | - |
dc.date.issued | 2004-06-01 | en_US |
dc.identifier.issn | 0916-8516 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/26737 | - |
dc.description.abstract | An RF CMOS active inductor with a novel loss compensation circuit network is proposed. Performance of this active inductor can be improved by adding a novel network, which simultaneously reduces parallel and series losses. Consequently, this technique not only increases Q value, inductance, and operating frequency, but also reduces power consumption and circuit complexity. Simulation results show that better performance indices can be achieved, such as minimum total equivalent loss of 1 mOmega, maximum Q value about 3E5, and inductance value from 20 nH to 45 nH in the RF range of 0.6 GHz to 1.6 GHz. Power dissipation is around 1.76 mW under 2.5 V dc supply voltage. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | active inductor | en_US |
dc.subject | internal loss | en_US |
dc.subject | inductance | en_US |
dc.subject | power dissipation | en_US |
dc.subject | Q value | en_US |
dc.title | Improving RF CMOS active inductor by simple loss compensation network | en_US |
dc.type | Article | en_US |
dc.identifier.journal | IEICE TRANSACTIONS ON COMMUNICATIONS | en_US |
dc.citation.volume | E87B | en_US |
dc.citation.issue | 6 | en_US |
dc.citation.spage | 1681 | en_US |
dc.citation.epage | 1683 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000221983300027 | - |
dc.citation.woscount | 2 | - |
Appears in Collections: | Articles |