電漿製程對元件中超薄氧化層的傷害

Abstract

本論文探討有關電漿蝕刻時對氧化層及元件特性的影響。本論文主 要分成兩部份。 第一部份將研究量產型MERIE及Helicon wave電漿蝕 刻機台對8nm氧化層的傷害。和濕式蝕刻比較，Helicon wave電漿蝕刻機 台對8nm氧化層僅有輕微的傷害。然而，MERIE將對晶片邊緣的氧化層造成 極大傷害。兩個指標，IETR及Qbd，將被用來探討此現象。經證實，IETR 較Qbd有效率且可靠。然而，對小於5nm的氧化層而言，由於在氧化層中的 電子捕捉現象並不明顯。因此，在接下來的實驗中將採用Qbd做為主要量 測研究。 第二部份將探討下吹式灰化機台中和光阻相關的傷害現象。 當元件的閘極氧化層厚度小於6nm時，此傷害現象主要發生在晶片中心區 域。隨附在天線結構上光阻厚度的增加，此傷害現象亦加劇。此現象和在 晶片上光阻的形狀亦有強烈關係。除此之外，和時間相關的傷害現象，將 使光阻為保護層產生衝擊性影響。此傷害現象需更進一步的探討方知其因 為何。 In this thesis, we study the plasma chargingdamage on thin gate oxide duringplasma processing. This thesis contains two topics. In the first part, production type MERIE and helicon wave etcher were studied during the course. It is found that 8nm-thick oxide suffers slight damage in helicon wave etcher as comparing with that treated by wet processing. In contrast, MERIE processingmay produce much heavier damageon devices, especially for those located at wafer edge. Two indicators, IETR abd Qbd, are used to survey the antenna effect. It is demonstrated that the IETR measurement is more reliable and efficientthan the Qbd measurement. Nevertheless, IETR method is not suitable for characterizing oxides with thickness less than 5nm, due to the fact that electron trapping events are not significant when stressing these ultra-thin films. Therefore, Qbd method will be utilized in the next topics. In the second part, photoresist-related charging damage was explored in the down-stream asher. For oxides thinner than 6nm, it is observed that those devices located at wafer center regionsuffer heavy damage. The degree of damage increases with increasing photoresist thickness laid on the antenna structure. The damage is also related to the topography of photoresiston the wafer. Moreover, the ashing-time dependent damage impacts that photoresistwas recognized as protection layer. Further works are required to understand thedetailed mechanism.