Title: | 針對多重數位訊號處理機 (DSP) 指令平行化方法之探討及其模擬評估環境之研製 A Study of Instruction Parallelization Techniques for Multiple DSPs and Implementation of Its Simulation and Evaluation Environment |
Authors: | 陳正 CHEN CHENG 國立交通大學資訊工程學系 |
Keywords: | 數位訊號處理器;指令平行化;模擬評估環境;Digital signal processor (DSP);Instruction parallelization;Simulation and evaluation environment |
Issue Date: | 2001 |
Gov't Doc #: | NSC90-2213-E009-158 |
URI: | http://hdl.handle.net/11536/93631 https://www.grb.gov.tw/search/planDetail?id=656158&docId=123880 |
Appears in Collections: | Research Plans |
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