| Title: | 射頻電路系統前瞻測試技術開發(II) Advanced Test Technology Development for RF Circuits and Systems(II) |
| Authors: | 蘇朝琴 SU CHAU-CHIN 交通大學電機與控制工程系 |
| Issue Date: | 2004 |
| Gov't Doc #: | NSC93-2215-E009-049 |
| URI: | http://hdl.handle.net/11536/91424 https://www.grb.gov.tw/search/planDetail?id=1026747&docId=195197 |
| Appears in Collections: | Research Plans |
- 射頻電路系統前瞻測試技術開發(I) / 蘇朝琴;SU CHAU-CHIN
- 射頻電路系統前瞻測試技術開發(III) / 蘇朝琴;SU CHAU-CHIN
- Design of Compact ESD Protection Circuit for V-Band RF Applications in a 65-nm CMOS Technology / Lin, Chun-Yu;Chu, Li-Wei;Tsai, Shiang-Yu;Ker, Ming-Dou
- 奈米CMOS之前瞻射頻類比電路設計---總計畫(II) / 柯明道;KER MING-DOU
- ESD Protection Design for 60-GHz LNA With Inductor-Triggered SCR in 65-nm CMOS Process / Lin, Chun-Yu;Chu, Li-Wei;Ker, Ming-Dou
- 用於寬頻通信之高性能單一載具整合晶片系統-子計畫二：應用系統構裝技術之多頻射頻前端積體電路(II) / 郭建男;KUO CHIEN-NAN
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